DocumentCode :
1480610
Title :
Two analog counters for neural network implementation
Author :
Madani, Kurosh ; Garda, Patrick ; Belhaire, Eric ; Devos, Francis
Author_Institution :
Inst. d´´Electron, Fondamentale, Univ. de Paris Sud, Orsay, France
Volume :
26
Issue :
7
fYear :
1991
fDate :
7/1/1991 12:00:00 AM
Firstpage :
966
Lastpage :
974
Abstract :
Simple analog circuits which are useful for the implementation of the synchronous Boltzmann machine learning algorithms are presented. A simple charge-transfer-based analog counter is described. The authors give a functional model of its behavior and analyze the differences between this model and the counter implementation. They also present simulation results and the test of a prototype. Along the same lines, they study a switched-current-based counter, which achieves better results (dynamic range, linearity) through higher complexity
Keywords :
CMOS integrated circuits; analogue computer circuits; counting circuits; linear integrated circuits; neural nets; CMOS IC; analog counters; charge-transfer-based; functional model; neural network implementation; switched-current-based counter; synchronous Boltzmann machine learning algorithms; Algorithm design and analysis; Artificial neural networks; Associate members; Biological system modeling; Counting circuits; Mathematical analysis; Neural networks; Neurons; Pattern recognition; Semiconductor device modeling;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.92016
Filename :
92016
Link To Document :
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