DocumentCode :
1480864
Title :
Lifting factorization-based discrete wavelet transform architecture design
Author :
Jiang, Wenqing ; Ortega, Antonio
Author_Institution :
Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
Volume :
11
Issue :
5
fYear :
2001
fDate :
5/1/2001 12:00:00 AM
Firstpage :
651
Lastpage :
657
Abstract :
In this paper, two new system architectures, overlap-state sequential and split-and-merge parallel, are proposed based on a novel boundary postprocessing technique for the computation of the discrete wavelet transform (DWT). The basic idea is to introduce multilevel partial computations for samples near data boundaries based on a finite state machine model of the DWT derived from the lifting scheme. The key observation is that these partially computed (lifted) results can also be stored back to their original locations and the transform can be continued anytime later as long as these partial computed results are preserved. It is shown that such an extension of the in-place calculation feature of the original lifting algorithm greatly helps to reduce the extra buffer and communication overheads, in sequential and parallel system implementations, respectively. Performance analysis and experimental results show that, for the Daubechies (see J.Fourier Anal. Appl., vol.4, no.3, p.247-69, 1998) (9,7) wavelet filters, using the proposed boundary postprocessing technique, the minimal required buffer size in the line-based sequential DWT algorithm is 40% less than the best available approach. In the parallel DWT algorithm we show 30% faster performance than existing approaches
Keywords :
buffer storage; channel bank filters; discrete wavelet transforms; filtering theory; finite state machines; parallel algorithms; parallel architectures; signal sampling; Daubechies wavelet filters; boundary postprocessing technique; buffer overhead; buffer size; communication delay; communication overhead; discrete wavelet transform; finite state machine model; in-place calculation feature; lifting factorization-based discrete wavelet transform; line-based sequential DWT algorithm; overlap-state sequential architecture; parallel DWT algorithm; parallel algorithms; parallel system; performance analysis; sequential system; split-and-merge parallel architecture; system architectures; wavelet filterbanks; Automata; Computer architecture; Concurrent computing; Discrete cosine transforms; Discrete transforms; Discrete wavelet transforms; Filtering; Filters; Performance analysis; Signal processing algorithms;
fLanguage :
English
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
1051-8215
Type :
jour
DOI :
10.1109/76.920194
Filename :
920194
Link To Document :
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