Title : 
KOAN/ANAGRAM II: new tools for device-level analog placement and routing
         
        
            Author : 
Cohn, John M. ; Garrod, David J. ; Rutenbar, Rob A. ; Carley, L. Richard
         
        
            Author_Institution : 
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
         
        
        
        
        
            fDate : 
3/1/1991 12:00:00 AM
         
        
        
        
            Abstract : 
The authors describe KOAN and ANAGRAM II, new tools for device-level analog placement and routing. Analog layout tools that merely apply known digital macrocell techniques fall short of achieving the density and performance of handcrafted analog cells. KOAN and ANAGRAM II differ from previous approaches by using general algorithmic techniques to find critical device-level layout optimizations rather than relying on a large library of fixed-topology module generators. New placement algorithms implemented in KOAN handle complex layout symmetries, dynamic merging and abutment of individual devices, and flexible generation of wells and bulk constants. New routing algorithms implemented in ANAGRAM II handle arbitrary gridless design rules in addition to over-the-device, crosstalk-avoiding, mirror-symmetric, and self-symmetric wiring. Examples of CMOS and BiCMOS analog cell layouts produced by these tools are presented
         
        
            Keywords : 
BIMOS integrated circuits; CMOS integrated circuits; analogue circuits; circuit layout CAD; ANAGRAM II; BiCMOS; CMOS; KOAN; complex layout symmetries; critical device-level layout optimizations; device-level analog placement; dynamic merging; fixed-topology module generators; general algorithmic techniques; gridless design rules; mirror-symmetric wiring; placement algorithms; routing; routing algorithms; self-symmetric wiring; Algorithm design and analysis; BiCMOS integrated circuits; Crosstalk; Geometry; Macrocell networks; Merging; Routing; Silicon; Software libraries; Wiring;
         
        
        
            Journal_Title : 
Solid-State Circuits, IEEE Journal of