Title :
A Self-Configurable Systolic Architecture for Face Recognition System Based on Principal Component Neural Network
Author :
Sudha, N. ; Mohan, A.R. ; Meher, Pramod K.
Author_Institution :
Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, Singapore
Abstract :
An efficient self-configurable systolic architecture is proposed in this paper for very large scale integration implementation of a face recognition system. The proposed system applies principal component neural network (PCNN) with generalized Hebbian learning for extracting eigenfaces from the face database. It demonstrates a recognition performance of more than 85% when evaluated on the benchmark Yale and FRGC databases containing images with varying illumination and expression. Unlike the existing face recognition systems, the proposed approach not only recognizes the faces using computed eigenfaces, but also updates eigenfaces automatically whenever the face database changes. The challenge, however, lies in hardware realization of the PCNN-based face recognition system. In the presence of computation-intensive steps of varying nature, it is not straightforward to map the overall computation to a single systolic architecture. A primary contribution of this paper from the architecture point of view is an optimized mapping of fine-grained systolized signal flow graphs (SFGs) for each individual step of the algorithm on to a single self-configurable linear systolic array by appropriate merging of the computations pertaining to different nodes of different SFGs. The architecture has the flexibility of processing face images and databases of any size and it is easily scalable with the number of eigenfaces to be computed. The proposed PCNN-based systolic face recognition system has been implemented and evaluated on a Xilinx ML403 evaluation platform with Virtex-4 XC4VFX12 FPGA. The FPGA-based design for a reasonably large-sized face database can process more than 400 faces in a video image frame which is fast enough for video surveillance in busy public places and sensitive locations.
Keywords :
Hebbian learning; VLSI; eigenvalues and eigenfunctions; face recognition; feature extraction; field programmable gate arrays; logic design; neural nets; principal component analysis; systolic arrays; video surveillance; visual databases; FRGC database; PCNN-based face recognition; Virtex-4 XC4VFX12 FPGA; Xilinx ML403 evaluation platform; eigenface extraction; face database; fine-grained systolized signal flow graph; generalized Hebbian learning; principal component neural network; self-configurable linear systolic array; self-configurable systolic architecture; very large scale integration implementation; video image frame; video surveillance; Computer architecture; Databases; Face; Face recognition; Hardware; Neurons; Training; Face recognition; field programmable gate array (FPGA) implementation; principal component neural network; systolic array;
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
DOI :
10.1109/TCSVT.2011.2133210