Title :
Active Guard Ring to Improve Latch-Up Immunity
Author :
Hui-Wen Tsai ; Ming-Dou Ker
Author_Institution :
Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A new design concept named as active guard ring and related circuit implementation to improve the latch-up immunity of ICs are proposed. Using additional sensing circuit and active buffer to turn ON the electrostatic discharge (ESD) protection transistors, the large-dimensional ESD (or I/O) devices can provide or receive extra compensation current to the negative or positive current perturbation during the latch-up current test. The new proposed solution has been verified in 0.6-μm 5 V process to have much higher latch-up resistance compared with the conventional prevention method of guard ring in CMOS technology.
Keywords :
CMOS integrated circuits; electrostatic discharge; flip-flops; integrated circuit design; integrated circuit testing; CMOS technology; ESD protection transistors; IC; active buffer; active guard ring; compensation current; current perturbation; electrostatic discharge protection transistors; large-dimensional ESD; latch-up current test; latch-up immunity; sensing circuit; size 0.6 mum; voltage 5 V; CMOS integrated circuits; Electrostatic discharges; Integrated circuits; Logic gates; Sensors; Substrates; Transistors; Electrostatic discharge (ESD) protection; guard ring; latchup; latchup.;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2014.2363171
