A new approach for the forward and backward substitutions of parallel solution of sparse linear equations-based on dataflow architecture

A parallel computational method to solve the forward and backward substitutions (F/B) of sparse linear equations for power systems is presented. The architectural model is a multiprocessor hypercube, based on the MIT tagged token dataflow architecture (TTDA). Communication overhead is considered. The differences of the operating time-units among the subtraction, multiplication, and division are modeled. A processor scheduling algorithm is introduced. In the algorithm, a highly sparse operational sequence matrix C is developed. From the C matrix, the minimal completion time, the critical path, and the scheduling of the processors for the proposed parallel F/B can be determined. The implementation of the TTDA architecture in the proposed method is explained in detail. Six power systems are examined and three scenarios are simulated to test the performance of the proposed method. The results are presented and discussed