DocumentCode :
1482265
Title :
Full-swing BiCMOS logic circuits with complementary emitter-follower driver configuration
Author :
Shin, Hyun J.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume :
26
Issue :
4
fYear :
1991
fDate :
4/1/1991 12:00:00 AM
Firstpage :
578
Lastpage :
584
Abstract :
Various full-swing BiCMOS logic circuits with complementary emitter-follower driver configurations are described. The performance of the circuits is demonstrated in a 1.2 μm complementary BiCMOS technology with a 6 GHz n-p-n and a 2 GHz p-n-p transistor. For the basic circuit, gate delay (fan-in=2, fan-out=1) is 366 ps and driving capability is 288 ps/pF at 4 V. Delay-power tradeoffs that depend on characteristics of the clamping diode between two base nodes of the complementary emitter-follower driver, parasitic capacitances at the two base nodes, and a technique that can be used to achieve full swing have been identified for these circuits. These circuits show leverage over the conventional BiCMOS circuit for reduced power-supply voltages
Keywords :
BIMOS integrated circuits; driver circuits; integrated logic circuits; 1.2 micron; 2 GHz; 366 ps; 6 GHz; BiCMOS logic circuits; clamping diode; complementary BiCMOS technology; complementary emitter-follower driver; full swing operation; gate delay; parasitic capacitances; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Clamps; Delay; Digital audio players; Diodes; Driver circuits; Logic circuits; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.75058
Filename :
75058
Link To Document :
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