• DocumentCode
    1482305
  • Title

    The floating point unit of the Golem B computer

  • Author

    Riesel, Zvi H.

  • Author_Institution
    Weizmann Institute of Science, Department of Applied Mathematics, Rehovot, Israel
  • Volume
    46
  • Issue
    7
  • fYear
    1976
  • fDate
    7/1/1976 12:00:00 AM
  • Firstpage
    355
  • Lastpage
    359
  • Abstract
    The Golem B computer is a fast machine using emitter-coupled logic and multi-layer circuits. The autonomous floating point arithmetic unit obtains its instructions and operands from buffers loaded ahead of need. Its main part, for 56-bit fractions, uses two 4-operand adder complexes with stored carries. In multiplication instructions, 4 bits of the multiplier are used to form a new partial product in each pass through an adder complex. Division instructions use a base-4 non-restoring algorithm. Addition favours the case of equal or nearly equal exponents, but 112 sum bits are accumulated for all exponent differences. An effort has been made to provide instructions and number formats that will aid the writing of compilers and operating systems.
  • Keywords
    digital arithmetic; Golem B computer; adder complex; autonomous floating point arithmetic unit; buffers; division instructions; emitter coupled logic; exponent differences; multi layer circuits; multiplication instructions; partial product;
  • fLanguage
    English
  • Journal_Title
    Radio and Electronic Engineer
  • Publisher
    iet
  • ISSN
    0033-7722
  • Type

    jour

  • DOI
    10.1049/ree.1976.0057
  • Filename
    5269066