High-temperature off-state characteristics of thin-SOI power devices

Author

Arnold, E. ; Letavic, T. ; Bhimnathwala, H.

Author_Institution

Philips Lab., Briarcliff Manor, NY, USA

Volume

17

Issue

12

fYear

1996

Firstpage

557

Lastpage

559

Abstract

High-temperature off-state characteristics of thin-SOI RESURF LDMOS transistors were studied experimentally and theoretically and compared with off-state characteristics of junction-isolated bulk-Si power devices. At 200/spl deg/C, the off-state leakage current in the SOI devices was approximately 200 times lower than in the bulk-Si devices with a comparable breakdown voltage and on-resistance. At 300/spl deg/C, well beyond the operating range of the bulk devices, the off-state leakage current in the SOI devices was only 1.5 nA/μm. The leakage current appears to scale with the thickness of the SOI layer. The results of this study indicate that LDMOS transistors fabricated in thin SOI layers are well suited for high-temperature power IC applications.

Keywords

high-temperature effects; leakage currents; power MOSFET; silicon-on-insulator; 200 to 300 C; RESURF LDMOS transistor; breakdown voltage; high-temperature off-state characteristics; leakage current; on-resistance; thin-SOI power device; Design optimization; Dielectric devices; Doping; Leakage current; MOSFETs; Power integrated circuits; Silicon devices; Silicon on insulator technology; Temperature; Voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.545769

Filename

545769