DocumentCode :
1483116
Title :
Integration and electrical isolation in CMOS mixed-signal wireless chips
Author :
Frye, Robert C.
Author_Institution :
Lucent Technol. Bell Labs., Murray Hill, NJ, USa
Volume :
89
Issue :
4
fYear :
2001
fDate :
4/1/2001 12:00:00 AM
Firstpage :
444
Lastpage :
455
Abstract :
The technological trends underlying the application of CMOS technology in wireless applications are leading to the integration of the RF analog functions and the digital baseband processing into a single chip. Two key technical requirements for this integration are the capability to fabricate high Q passive components and the need to maintain electrical isolation between analog and digital components in the resulting mixed-signal chip. Some basic arguments that illustrate the technological conflict between these two important demands are presented, focusing on their implications for the structure of the IC substrate. This structure and the characteristics of the device package play important robs in determining the levels of coupled ground noise that will be present in the mixed-signal IC. A simple, high-level model for coupled ground noise is presented and used to illustrate the impact of design alternatives for the package and for the IC substrate
Keywords :
CMOS integrated circuits; integrated circuit modelling; integrated circuit noise; isolation technology; mixed analogue-digital integrated circuits; radio equipment; CMOS mixed-signal wireless chip; IC substrate; RF analog circuit; coupled ground noise; digital baseband processing; electrical isolation; high-level model; passive component; process integration; Analog circuits; CMOS technology; Costs; Integrated circuit modeling; Integrated circuit noise; Integrated circuit technology; Isolation technology; Paper technology; Radio frequency; Semiconductor device noise;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/5.920577
Filename :
920577
Link To Document :
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