• DocumentCode
    1483265
  • Title

    A Low-Cost Solution for Deploying Processor Cores in Harsh Environments

  • Author

    Violante, Massimo ; Meinhardt, Cristina ; Reis, Ricardo ; Reorda, Matteo Sonza

  • Author_Institution
    Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
  • Volume
    58
  • Issue
    7
  • fYear
    2011
  • fDate
    7/1/2011 12:00:00 AM
  • Firstpage
    2617
  • Lastpage
    2626
  • Abstract
    Nowadays, a number of processor cores are available, either as soft intellectual property (IP) cores or as hard macros that can be employed in developing new systems on a chip. Developers of applications targeting harsh environments like the atmospheric radiation environment or the space radiation environment may benefit from the computing power of processor cores, provided that suitable techniques are available for guaranteeing their correct operations in presence of the ionizing radiation that abounds in such environments. In this paper, we describe a design flow and hardware/software architecture to successfully deploy processor IP cores in harsh environments. Experimental data are provided that confirm the robustness of the presented architecture with respect to transient errors induced by radiation and suggest the possibility of employing such architectures in deep-space exploration missions.
  • Keywords
    field programmable gate arrays; hardware-software codesign; ionisation; microprocessor chips; radiation hardening (electronics); system-on-chip; COTS FPGA; atmospheric radiation environment; computing power; deep-space exploration mission; design flow; field-programmable gate array; hard macro; hardware-software architecture; harsh environment; ionizing radiation; processor IP core; single event upset; soft intellectual property core; space radiation environment; system recovery; systems on a chip; transient error; Aerospace electronics; Computer architecture; Context; Field programmable gate arrays; Hardware; IP networks; Software; Field-programmable gate arrays (FPGAs); intellectual property (IP) cores; single-event upset (SEU); system recovery;
  • fLanguage
    English
  • Journal_Title
    Industrial Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0046
  • Type

    jour

  • DOI
    10.1109/TIE.2011.2134054
  • Filename
    5740344