• DocumentCode
    1483797
  • Title

    RC delay metrics for performance optimization

  • Author

    Alpert, Charles J. ; Devgan, Anirudh ; Kashyap, Chandramouli V.

  • Author_Institution
    IBM Corp., Austin, TX, USA
  • Volume
    20
  • Issue
    5
  • fYear
    2001
  • fDate
    5/1/2001 12:00:00 AM
  • Firstpage
    571
  • Lastpage
    582
  • Abstract
    For performance optimization tasks such as floorplanning, placement, buffer insertion, wire sizing, and global routing, the Elmore resistance-capacitance (RC) delay metric remains popular due to its simple closed form expression, fast computation speed, and fidelity with respect to simulation. More accurate delay computation methods are typically central processing unit intensive and/or difficult to implement. To bridge this gap between accuracy and efficiency/simplicity, we propose two new RC delay metrics called delay via two moments (D2M) and effective capacitance metric (ECM), which are virtually as simple and fast as the Elmore metric, but more accurate. D2M uses two moments of the impulse response in a simple formula that has high accuracy at the far end of RC lines. ECM captures resistive shielding effects by modeling the downstream capacitance by an “effective capacitance.” In contrast, the Elmore metric models this as a lumped capacitance, thereby ignoring resistive shielding. Although not as accurate as D2M, ECM yields consistent performance and may be well-suited to optimization due to its Elmore-like recursive construction
  • Keywords
    circuit optimisation; delays; integrated circuit design; integrated circuit interconnections; Elmore metric; RC delay metric; buffer insertion; computer simulation; delay via two moments; effective capacitance metric; floorplanning; global routing; impulse response; integrated circuit design; interconnect delay; performance optimization; placement; resistive shielding; wire sizing; Capacitance; Circuit simulation; Computational modeling; Delay effects; Design optimization; Electrochemical machining; Integrated circuit interconnections; Linear circuits; Propagation delay; Routing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.920682
  • Filename
    920682