Title :
FabScalar: Automating Superscalar Core Design
Author :
Choudhary, Niket K. ; Wadhavkar, Salil V. ; Shah, Tanmay A. ; Mayukh, Hiran ; Gandhi, Jayneel ; Dwiel, Brandon H. ; Navada, Sandeep ; Najaf-Abadi, Hashem H. ; Rotenberg, Eric
Author_Institution :
North Carolina State Univ., Raleigh, NC, USA
Abstract :
Providing multiple superscalar core types on a chip, each tailored to different classes of instruction-level behavior, is an exciting direction for increasing processor performance and energy efficiency. Unfortunately, processor design and verification effort increases with each additional core type, limiting the microarchitectural diversity that can be practically implemented. FabScalar aims to automate superscalar core design, opening up processor design to microarchitectural diversity and its many opportunities.
Keywords :
energy conservation; multiprocessing systems; FabScalar; energy efficiency; instruction-level behavior; microarchitectural diversity; multiple superscalar core types; processor design; processor performance; superscalar core design; Hardware design languages; Instruction sets; Microarchitecture; Multicore processing; Program processors; ILP; design automation; heterogeneous (asymmetric) multicore; instruction-level parallelism; specialization; superscalar processors;
Journal_Title :
Micro, IEEE
