DocumentCode :
1484855
Title :
A Critical Review on Multiscale Material Database Requirement for Accurate Three-Dimensional IC Simulation Input
Author :
Yeap, Kong-Boon ; Roellig, Mike ; Huebner, Rene ; Gall, Martin ; Sukharev, Valeriy ; Zschech, Ehrenfried
Author_Institution :
Fraunhofer Inst. for Nondestructive Testing (IZFP), Dresden, Germany
Volume :
12
Issue :
2
fYear :
2012
fDate :
6/1/2012 12:00:00 AM
Firstpage :
217
Lastpage :
224
Abstract :
Material behavior and properties at different scales, from nanometers to millimeters, are the input data needed for a model-based design-for-manufacturing approach of 3-D through-silicon-via (TSV) stacked ICs. In particular, mechanical and thermomechanical material data have to be used as input for physics-based modeling and simulation of stress-induced phenomena in 3-D stacks. Both package- and wafer-level properties, including their interaction, have to be considered. This paper reviews the thermomechanical and mechanical properties of several structures: time-dependent properties of solder materials (millimeter and micrometer scales), microstructure-dependent properties of Cu TSVs (micrometer scale), and process-dependent properties of ultralow- k materials in on-chip interconnect stacks (10-nm scale). To minimize the keep-out zone for active devices in the stress-affected surrounding of TSVs, while maintaining the device performance during 3-D TSV stacking of ICs, highly accurate material data are needed as input for the thermomechanical stress simulation. A similar strategy is supposed to be developed for a model-based design-for-reliability approach of 3-D TSV stacked ICs.
Keywords :
integrated circuit reliability; low-k dielectric thin films; solders; three-dimensional integrated circuits; wafer level packaging; 3D through-silicon-via stacked IC; TSV stacked IC; material behavior; microstructure-dependent properties; millimeters; model-based design-for-manufacturing approach; model-based design-for-reliability approach; multiscale material database requirement; nanometers; on-chip interconnect stacks; physics-based modeling; process-dependent properties; solder material; stress-induced phenomena; thermomechanical material data; three-dimensional IC simulation input; time-dependent properties; ultralow-k materials; wafer-level packaging; wafer-level property; Copper; Creep; Integrated circuit modeling; Strain; Stress; 3-D integration; Device performance; material database; multiscale simulation; through-silicon via (TSV);
fLanguage :
English
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
1530-4388
Type :
jour
DOI :
10.1109/TDMR.2012.2193401
Filename :
6178272
Link To Document :
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