DocumentCode :
1485479
Title :
A Novel Emulator for Discrete-Time MIMO Triply Selective Fading Channels
Author :
Ren, Fei ; Zheng, Yahong Rosa
Author_Institution :
Dept. of Electr. & Comput. Eng., Missouri Univ. of Sci. & Technol., Rolla, MO, USA
Volume :
57
Issue :
9
fYear :
2010
Firstpage :
2542
Lastpage :
2551
Abstract :
Hardware implementation of discrete-time triply selective Rayleigh fading channel emulators is proposed for multiple-input-multiple-output (MIMO) communications. The proposed work differs from existing ones in that it incorporates temporal correlation, intertap correlation, and spatial correlation matrices into multiple uncorrelated frequency-flat fading waveforms to obtain a triply selective fading channel. The flat fading waveforms with temporal correlation or Doppler spectrum are generated using a sum-of-sinusoid method. The intertap correlation matrix associated with multipath delay spread is computed according to the channel power delay profile and transmit/receive filters. The spatial correlation matrices are predefined inputs associated with transmit and receive antenna arrangements. The square roots of the three correlation matrices are computed via singular-value decomposition and then combined in real time with the flat fading waveforms. Several fading channel examples are implemented on an Altera Stratix III EP3SL150F field-programmable gate array (FPGA) DSP development kit with fixed-point arithmetics. A 4-by-4 MIMO triply selective channel with ten correlated delay taps per subchannel utilizes one-third of the hardware resource of the FPGA chip. The statistical properties of the emulated fading waveforms match those of the software-based simulators and the theoretical ones. The proposed method achieves good balance between computational complexity and resource utilization.
Keywords :
MIMO communication; antenna arrays; computational complexity; fading channels; field programmable gate arrays; receiving antennas; transmitting antennas; DSP development; Doppler spectrum; FPGA chip; computational complexity; discrete-time MIMO triply selective fading channels; emulator; field-programmable gate array; flat fading waveforms; hardware implementation; multiple-input-multiple-output communications; receive antenna; resource utilization; software-based simulators; spatial correlation matrices; sum-of-sinusoid method; temporal correlation; transmit antenna; Delay; Fading; Field programmable gate arrays; Filters; Frequency; Hardware; MIMO; Matrix decomposition; Rayleigh channels; Receiving antennas; Discrete-time triply selective fading channels; field-programmable gate array (FPGA) hardware implementation; multiple-input–multiple-output (MIMO) systems; sum-of-sinusoid (SoS) method; wireless fading channel modeling;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2010.2046226
Filename :
5460922
Link To Document :
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