DocumentCode
148796
Title
Electrical test method of open defects at data buses in 3D SRAM IC
Author
Shiraishi, Yasuyuki ; Hashizume, Masaki ; Yotsuyanagi, Hiroyuki ; Tada, Tetsuya ; Shyue-Kung Lu
Author_Institution
Univ. of Tokushima, Tokushima, Japan
fYear
2014
fDate
23-25 April 2014
Firstpage
235
Lastpage
238
Abstract
An electrical test method is proposed for detecting an open defect occurring at a data bus of a 3D SRAM IC. Targeted defects are a hard open defect and a soft one in a data bus. The test method is based on supply current of the IC. There is no need to add a circuit for the test method to an original circuit. Feasibility of the tests is examined by some experiments for a circuit made of an SRAM IC on a printed circuit board. The experimental results show us that resistive open defects whose resistance is greater than 300Ω can be detected by the test method.
Keywords
SRAM chips; integrated circuit testing; system buses; three-dimensional integrated circuits; 3D SRAM IC; data bus; electrical test method; open defect; printed circuit board; resistance; Current measurement; Data buses; Integrated circuit interconnections; Random access memory; Three-dimensional displays; Through-silicon vias; 3D IC; SRAM; data bus; open defect; supply current test;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging (ICEP), 2014 International Conference on
Conference_Location
Toyama
Print_ISBN
978-4-904090-10-7
Type
conf
DOI
10.1109/ICEP.2014.6826696
Filename
6826696
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