DocumentCode
1488110
Title
A Low-Cost Resonance Mitigation Technique for Multidrop Memory Interfaces
Author
Aryanfar, Farshid ; Amirkhany, Amir
Author_Institution
Rambus Inc., Los Altos, CA, USA
Volume
57
Issue
5
fYear
2010
fDate
5/1/2010 12:00:00 AM
Firstpage
339
Lastpage
342
Abstract
A passive resonance mitigation technique is proposed for multidrop memory interfaces. In this method, coupled transmission lines are used to prevent destructive signal resonance caused by signal reflection from the capacitive loads and mismatches in the channel. The proposed idea is verified in a simple experimental setup that roughly models a multi-Dual In-Line Memory Module system, and measurement results are provided.
Keywords
DRAM chips; coupled transmission lines; printed circuits; capacitive loads; coupled transmission lines; destructive signal resonance; low cost resonance mitigation technique; multidrop memory interfaces; multidual in-line memory module system; passive resonance mitigation technique; signal reflection; High-speed signaling; memory; multidrop; notchy channel; resonance;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2010.2047306
Filename
5462960
Link To Document