Title :
A 5-Gb/s Inductorless CMOS Adaptive Equalizer for PCI Express Generation II Applications
Author :
Cheng, Kuo-Hsing ; Tsai, Yu-Chang ; Wu, Yen-Hsueh ; Lin, Ying-Fu
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
fDate :
5/1/2010 12:00:00 AM
Abstract :
This brief presents a 5-Gb/s adaptive equalizer that compensates for the PCI Express channel loss of 14 dB at 2.5 GHz. This equalizing filter uses low-voltage zero generators (LVZGs) to generate high-frequency gain boosting without inductors. The spectrum-balancing technique eliminates the need for a slicer. The power detector combines current steering techniques and a preamplifier circuit to enhance the voltage swing. This design consumes 17.6 mW (excluding the output buffers) at a 1.6-V supply voltage with an output swing of 560 mV (p-p). The area occupied is 0.1 (including output buffers), and the output peak-to-peak jitter is 0.28 UI. The equalizer achieves high-frequency compensation, small area, and low power consumption.
Keywords :
CMOS integrated circuits; adaptive equalisers; jitter; low-power electronics; peripheral interfaces; spectral analysis; 5-Gb/s inductorless CMOS adaptive equalizer; PCI express generation II applications; bit rate 5 Gbit/s; current steering techniques; frequency 2.5 GHz; high frequency gain boosting; low voltage zero generator; peak to peak jitter; power 17.6 mW; power consumption; power detector; preamplifier circuit; spectrum balancing technique; voltage 1.6 V; voltage 560 mV; Adaptive equalizer; equalizing filter; high-speed serial links; inductorless; power detector;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2010.2047311