Title :
MOSFET Switching Loss Model and Optimal Design of a Current Source Driver Considering the Current Diversion Problem
Author :
Fu, Jizhen ; Zhang, Zhiliang ; Liu, Yan-Fei ; Sen, Paresh C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Queen´´s Univ., Kingston, ON, Canada
Abstract :
A new analytical switching loss model for power MOSFETs driven by the current source driver (CSD) is presented in this paper. The gate current diversion problem, which commonly exists in existing CSDs, is analyzed mathematically. In addition, a new accurate switching loss model considering every switching interval piecewisely is proposed. Based on the proposed loss model, the optimal design of the CSD inductor is achieved to minimize the total power loss for the buck converter. The experimental result verifies the proposed switching loss model and optimal design. The measured loss matches the calculated loss very well; the error between the calculated loss and measured one is less than 10% from 5 A load to 30 A load with 12 V input and 1.3 V output. As compared with the previous study, the efficiency with the optimal CSD inductor is improved from 86.1% to 87.6% at 12 V input and 1.3 V/20 A output and from 82.4% to 84.0% at 12 V input and 1.3 V/30 A output at 1 MHz switching frequency. As compared with the commercial driver-MOSFETs from Renesas and International Rectifier, the buck converter with the optimal CSD still shows better performance.
Keywords :
DC-DC power convertors; constant current sources; driver circuits; field effect transistor switches; inductors; power MOSFET; CSD inductor; MOSFET switching loss model; analytical switching loss model; buck converter; current 20 A; current 30 A; current diversion problem; current source driver; gate current diversion problem; optimal design; power MOSFET; voltage 1.3 V; voltage 12 V; Driver circuits; Inductance; Inductors; Logic gates; Power MOSFET; Switching loss; Buck converter; common source inductor; current diversion problem; current source driver (CSD); driver-MOSFET (DrMos); loss model; optimal design; power MOSFET; voltage regulator (VR);
Journal_Title :
Power Electronics, IEEE Transactions on
DOI :
10.1109/TPEL.2011.2138163