Floating Gate Synapses With Spike-Time-Dependent Plasticity

Author

Ramakrishnan, S. ; Hasler, P.E. ; Gordon, C.

Author_Institution

Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

5

Issue

3

fYear

2011

fDate

6/1/2011 12:00:00 AM

Firstpage

244

Lastpage

252

Abstract

This paper describes a single transistor floating-gate synapse device that can be used to store a weight in a nonvolatile manner, compute a biological EPSP, and demonstrate biological learning rules such as Long-Term Potentiation, LTD, and spike-time dependent plasticity. We also describe a highly scalable architecture of a matrix of synapses to implement the described learning rules. Parameters for weight update in the 0.35 um process have been extracted and can be used to predict the change in weight based on time difference between pre- and post-synaptic spike times.

Keywords

bioelectric potentials; biomedical electronics; learning (artificial intelligence); medical signal processing; neurophysiology; random-access storage; biological EPSP; biological learning rules; floating gate synapses; highly scalable architecture; long-term potentiation; nonvolatile storage; single transistor floating-gate synapse device; spike-time-dependent plasticity; weight update; Arrays; Biology; Logic gates; Mathematical model; Timing; Transistors; Tunneling; Adaptation; learning; neuromorphic; spike-time-dependent plasticity (STDP);

fLanguage

English

Journal_Title

Biomedical Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

1932-4545

Type

jour

DOI

10.1109/TBCAS.2011.2109000

Filename

5746628