DocumentCode
1492043
Title
High-speed 10-bit LCD column driver with a split DAC and a class-AB output buffer
Author
Woo, Jong-Kwan ; Shin, Dong-Yong ; Jeong, Deog-Kyoon ; Kim, Suhwan
Author_Institution
Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea
Volume
55
Issue
3
fYear
2009
fDate
8/1/2009 12:00:00 AM
Firstpage
1431
Lastpage
1438
Abstract
We propose a high-speed rail-to-rail 10-bit column driver with a reduced die area for LCD-TV applications. This column driver combines an 8-bit resistor-string digital-to-analog converter (R-DAC), constructed using a hybrid-type decoder to reduce the RC time delay and die area, with a 2-bit interpolation DAC. In the output buffer, error amplifiers drive a column line so as to realize a highspeed rail-to-rail drive. Gamma-corrected output voltages are generated by the resistor string of R-DAC, which contains resistors of unequal values that match the inverse of the liquid crystal transmittance-voltage characteristic. A prototype 10- bit LCD column driver was designed and fabricated using a 0.3 mum CMOS technology, and has a settling time of within 2 mus and a quiescent current of 5.4 muA per channel.
Keywords
digital-analogue conversion; driver circuits; flat panel displays; liquid crystal displays; 8-bit resistor-string digital-to-analog converter; LCD-TV applications; class-AB output buffer; current 5.4 muA; error amplifiers; gamma-corrected output voltages; high-speed 10-bit LCD column driver; liquid crystal transmittance-voltage characteristic; size 0.3 mum; split DAC; time 2 mus; CMOS technology; Decoding; Delay effects; Digital-analog conversion; Driver circuits; Interpolation; Rail to rail amplifiers; Rail to rail outputs; Resistors; Voltage; DAC; LCD driver IC; class-AB; gamma correction;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/TCE.2009.5278010
Filename
5278010
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