• DocumentCode
    1492603
  • Title

    An efficient tree cache coherence protocol for distributed shared memory multiprocessors

  • Author

    Chang, Yeimkuan ; Bhuyan, Laxmi N.

  • Author_Institution
    Dept. of Inf. Manage., Chung-Hua Univ., Taiwan
  • Volume
    48
  • Issue
    3
  • fYear
    1999
  • fDate
    3/1/1999 12:00:00 AM
  • Firstpage
    352
  • Lastpage
    360
  • Abstract
    Directory schemes have long been used to solve the cache coherence problem for large scale shared memory multiprocessors. In addition, tree-based protocols have been employed to reduce the directory size and the invalidation latency for a large degree of data sharing in the system. However, the existing tree-based protocols involve a very high communication overhead for maintaining a balanced tree, especially when the degree of data sharing is low. This paper presents a new tree-based cache coherence protocol which is a hybrid of the limited directory and the linked list schemes. By utilizing a limited number of pointers in the directory, the proposed protocol connects the nodes caching a shared block in a tree fashion without incurring any communication overhead. In addition to the low communication overhead, the proposed scheme also possesses the advantages of the existing bit-map and tree-based linked list protocols, namely, scalable memory requirement and logarithmic invalidation latency. We evaluate the performance of our protocol by running four applications on the Proteus execution-driven simulator. Our simulation results show that the performance of the proposed protocol is very close to that of the full-map protocol
  • Keywords
    discrete event simulation; distributed shared memory systems; memory protocols; performance evaluation; Proteus execution-driven simulator; data sharing; directory schemes; distributed shared memory multiprocessors; linked list schemes; logarithmic invalidation latency; performance; scalable memory requirement; tree cache coherence protocol; Broadcasting; Coherence; Degradation; Delay; Large-scale systems; Multiprocessor interconnection networks; Parallel processing; Parallel programming; Protocols; System performance;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.755001
  • Filename
    755001