Characteristics of Traps Induced by Hot Holes Under Negative-Bias Temperature Stress in a pMOSFET

Author

Jo, Minseok ; Chang, Man ; Kim, Seonghyun ; Jung, Seungjae ; Park, Ju-Bong ; Lee, Joonmyoung ; Seong, Dong-jun ; Hwang, Hyunsang

Author_Institution

Dept. of Mater. Sci. & Eng., Gwangju Inst. of Sci. & Technol., Gwangju, South Korea

Volume

30

Issue

11

fYear

2009

Firstpage

1194

Lastpage

1196

Abstract

We investigated the generation and recovery process of traps in pMOSFETs under negative-bias temperature (NBT) stress by using pulsed and dc measurements. The behavior of generated traps was studied as a function of applied body bias (V _B). The fast components induced with the application of a positive V _B were independent of measurement time (t _m), while the results from devices with no applied V _B showed a strong dependence on t _m. This suggests that the fast components of additional traps generated by a positive V _B can be attributed to interface states (N _it) at the Si/SiO₂ interface. Based on the results of recovery characteristics with an intentional measurement delay, the recovery of N _it is relatively slow, initiating on the scale of a few milliseconds.

Keywords

MOSFET; elemental semiconductors; hole traps; interface states; silicon; silicon compounds; Si-SiO₂; applied body bias; hot hole traps; interface states; measurement delay; measurement time; negative-bias temperature stress; pMOSFET; Body bias; bulk traps; hot hole; interface states; negative-bias temperature (NBT) stress;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2009.2030772

Filename

5280280