The block-optimal realization of separable-in-denominator 2-D digital filters

Author

Zilouchian, A. ; Haung, Z. ; Wang, D.

Author_Institution

Dept. of Electr. Eng., Florida Atlantic Univ., Boca Raton, FL, USA

Volume

46

Issue

4

fYear

1999

fDate

4/1/1999 12:00:00 AM

Firstpage

457

Lastpage

460

Abstract

The optimal synthesis of a single input single output separable-in-denominator 2-D digital filter with fixed-point arithmetic is investigated. In the first phase, a general partial fraction expansion for this class of filter is presented. In sequel, a parallel block-optimal realization is proposed in order to minimize the round-off noise under L2 scaling. A novel criterion for the absence of limit cycle of second order block-optimal structure is also derived. A numerical example is provided to illustrate the effectiveness of the proposed method

Keywords

fixed point arithmetic; limit cycles; two-dimensional digital filters; L2 scaling; fixed point arithmetic; limit cycle; parallel block optimal synthesis; partial fraction expansion; roundoff noise; separable-in-denominator 2D digital filter; Computational complexity; Delay; Digital filters; Fixed-point arithmetic; Geophysical signal processing; Geophysics computing; Limit-cycles; Signal processing; Throughput; Two dimensional displays;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.755416

Filename

755416