DocumentCode :
1494062
Title :
Test Structure for Characterization of Low-Frequency Noise in CMOS Technologies
Author :
Wei, Chengqing ; Xiong, Yong-Zhong ; Zhou, Xing
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
Volume :
59
Issue :
7
fYear :
2010
fDate :
7/1/2010 12:00:00 AM
Firstpage :
1860
Lastpage :
1865
Abstract :
This paper describes an alternative way of driving the complementary metal-oxide-semiconductor (CMOS) device into different drain-current levels for low-frequency-noise (LFN) characterization. A floating-gate (FG) test structure that constructs the characterized MOSFET with an extra control gate is proposed. A metal-insulator-metal (MIM) capacitor is used to construct this control gate. Instead of applying different input-dc-bias supplies for the gate terminals of the MOSFETs, the device is directly programmed to the drain-current levels of interest by CHARGE/DISCHARGE operations. In this case, no gate bias is required in the drain-current noise measurement, so that any potential disadvantages from gate-bias supply networks that would prevent accurate noise measurements are totally excluded. The LFN measurement results demonstrating the feasibility of the proposed test structure are also reported.
Keywords :
CMOS integrated circuits; MIS capacitors; MOSFET; electric noise measurement; CMOS technology; MOSFET; charge operations; complementary metal oxide semiconductor; discharge operations; drain-current levels; drain-current noise measurement; floating gate test structure; low frequency noise; metal-insulator-metal capacitor; $1/f$ noise; floating-gate (FG) structure; low-frequency noise (LFN); noise measurement; random telegraph signal (RTS);
fLanguage :
English
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9456
Type :
jour
DOI :
10.1109/TIM.2009.2028783
Filename :
5280360
Link To Document :
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