DocumentCode :
1494834
Title :
Optimization of sub-5-nm multiple-thickness gate oxide formed by oxygen implantation
Author :
King, Ya-Chin ; Kuo, Charles ; King, Tsu-Jae ; Hu, Chenming
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume :
48
Issue :
6
fYear :
2001
fDate :
6/1/2001 12:00:00 AM
Firstpage :
1279
Lastpage :
1281
Abstract :
A new method of growing multiple gate oxide thicknesses below 5 nm using masked oxygen implantation is presented. Multiple thicknesses can be achieved on the same wafer without degradation in the oxide properties. The oxygen implanted oxide quality is comparable to that of thermally grown oxides. Moreover, the effects of oxygen implant damage is minimized with higher implant energies, thicker sacrificial oxides, and low-temperature annealing
Keywords :
CMOS integrated circuits; MOSFET; annealing; dielectric thin films; integrated circuit technology; ion implantation; oxidation; 5 nm; O; high implant energies; implant damage minimization; implanted oxide quality; low-temperature annealing; masked O implantation; multiple-thickness gate oxide; oxide properties; sacrificial oxides; sub-5 nm gate oxide CMOS technologies; Annealing; Boron; Fabrication; Implants; Oxidation; Oxygen; Semiconductor films; Silicon; Substrates; Thermal degradation;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.925262
Filename :
925262
Link To Document :
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