DocumentCode :
1495256
Title :
Reduced offsets for minimization of binary-valued functions
Author :
Malik, Abdul A. ; Brayton, Robert K. ; Newton, A. Richard ; Sangiovanni-Vincentelli, Alberto
Author_Institution :
IBM Thomas J Watson Res. Center, Yorktown Heights, NY, USA
Volume :
10
Issue :
4
fYear :
1991
fDate :
4/1/1991 12:00:00 AM
Firstpage :
413
Lastpage :
426
Abstract :
A modified approach to two-level logic minimization is described which obviates the need to compute the offset, yet provides the same global picture available with the offset. This approach is based on a new concept called the reduced offset. It is shown that reduced offsets can be computed without using the offset. This scheme has been implemented in ESPRESSO with an interface to the multilevel minimization environment MIS, where it is used to minimize individual nodes (representing two-level functions with single outputs) in multilevel networks. Such functions usually have very large offsets because of a large number of variables in their don´t care sets. The modified approach is up to 8.5 times faster than ESPRESSO on a set of benchmark examples
Keywords :
logic CAD; minimisation of switching nets; CAD; ESPRESSO; MIS; binary-valued functions; multilevel minimization environment; multilevel networks; reduced offset; two-level logic minimization; Boolean functions; Logic; Minimization methods; Testing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.75625
Filename :
75625
Link To Document :
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