DocumentCode :
1495363
Title :
Modulo multipliers using polynomial rings
Author :
Radhakrishnan, D.
Author_Institution :
Sch. of Appl. Sci., Nanyang Technol. Univ., Singapore
Volume :
145
Issue :
6
fYear :
1998
fDate :
12/1/1998 12:00:00 AM
Firstpage :
443
Lastpage :
445
Abstract :
The performance of many DSP chips depends to a great extent on their multiply-accumulate (MAC) speed. In this direction, the use of residue arithmetic has been proved to enhance the speed of multiplier units. One approach has been to convert all multiplication operations to addition, thereby speeding up the whole operation. This was made possible by defining a logarithmic transform for the integers in a finite field, more specifically in a prime field GF(p). The author extends this approach to the case of polynomial rings (quotient rings), thereby providing more choices for the selection of moduli in RNS multipliers
Keywords :
Galois fields; digital signal processing chips; multiplying circuits; residue number systems; DSP chips; finite field; logarithmic transform; modulo multipliers; multiplication operations; multiply-accumulate speed; polynomial rings; prime field; quotient rings; residue arithmetic;
fLanguage :
English
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2409
Type :
jour
DOI :
10.1049/ip-cds:19982390
Filename :
756344
Link To Document :
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