Title :
A layout modification approach to via minimization
Author :
The, Khe-Sing ; Wong, D.F. ; Cong, Jingsheng
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
fDate :
4/1/1991 12:00:00 AM
Abstract :
The approach is to eliminate vias systematically by modifying the routing layout. The algorithm was implemented and applied to benchmark routing layouts published in the literature. Significant reduction in the number of vias was obtained without increasing the routing area. The experimental results show that the algorithm is more effective in via reduction and more efficient in running time than conventional via minimization algorithms. In particular, for Burstein´s 19-track two-layer routing solution to Deutsch´s difficult problem, the algorithm obtains a 34% reduction in the number of vias, which is more than an 11% improvement over the conventional constrained via minimization (CVM) approach. The application of the algorithm to various solutions to Deutsch´s difficult problem produces the fewest of vias ever reported in the literature
Keywords :
circuit layout; minimisation; network topology; benchmark routing layouts; layout modification; routing layout; via minimization; via reduction; Computer science; Contacts; Costs; Degradation; Integrated circuit interconnections; Minimization methods; Routing; Signal mapping; Topology; Wire;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on