DocumentCode :
1496293
Title :
A fail-safe interlocking system for railways
Author :
Chandra, Vinod ; Verma, M.R.
Author_Institution :
Indian Inst. of Technol., New Delhi, India
Volume :
8
Issue :
1
fYear :
1991
fDate :
3/1/1991 12:00:00 AM
Firstpage :
58
Lastpage :
66
Abstract :
A new approach to the design of microprocessor-based failsafe systems for railways that was used to design the FIRM architecture is described. The approach involves assigning appropriate levels of safety to system functions, depending on how critical they are, instead of using the same safety standard for all functions. The FIRM (short for failsafe interlocking system for railways using microprocessors) architecture uses a pair of processors that operate in a see-saw mode, with one or more pairs kept on standby. The installation and testing of an engineering prototype of the architecture that was fabricated for Indian Railways are discussed.<>
Keywords :
railways; safety systems; traffic computer control; FIRM architecture; engineering prototype; fail-safe interlocking system; installation; microprocessor-based failsafe systems; railways; testing; Condition monitoring; Emergency power supplies; Hardware; Rail transportation; Railway safety; Safety devices; Signal processing; Software safety; Software testing; System testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.75664
Filename :
75664
Link To Document :
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