Hole Mobilities of $\\hbox {Si/Si}_{0.5}\\hbox {Ge}_{0.5}$ Quantum-Well Transistor on SOI and Strained SOI

Author

Yu, W. ; Zhang, B. ; Zhao, Q.T. ; Buca, D. ; Hartmann, J. -M ; Lupták, R. ; Mussler, G. ; Fox, A. ; Bourdelle, K.K. ; Wang, X. ; Mantl, S.

Author_Institution

Shanghai Inst. of Microsyst. & Inf. Technol., Shanghai, China

Volume

33

Issue

6

fYear

2012

fDate

6/1/2012 12:00:00 AM

Firstpage

758

Lastpage

760

Abstract

Hole mobilities of quantum-well p-MOSFETs on strained Si (sSi)/Si_0.5Ge_0.5/strained SOI (sSOI) and Si/Si_0.5Ge_0.5/SOI heterostructure substrates are investigated as a function of temperature. Ge interdiffusion during annealing in highly strained Si_0.5Ge_0.5 on SOI is reduced by the growth of Si_0.5Ge_0.5 layer on biaxially tensely strained SOI. As a result, the sSi/Si_0.5Ge_0.5/sSOI transistors showed significantly higher hole mobilities than the Si/Si_0.5Ge_0.5/SOI device at low temperatures.

Keywords

Ge-Si alloys; MOSFET; annealing; hole mobility; quantum well devices; silicon-on-insulator; Si-SiGe; annealing; biaxially tensely strained SOI; heterostructure substrates; hole mobilities; interdiffusion; quantum well p-MOSFET; silicon-on-insulator; MOSFET circuits; Silicon; Silicon germanium; Strain; Substrates; Temperature measurement; Transistors; Hole mobility; SiGe; quantum well (QW); strained Si (sSi);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2012.2190035

Filename

6184280

Hole Mobilities of Quantum-Well Transistor on SOI and Strained SOI

Yu, W. ; Zhang, B. ; Zhao, Q.T. ; Buca, D. ; Hartmann, J. -M ; Lupták, R. ; Mussler, G. ; Fox, A. ; Bourdelle, K.K. ; Wang, X. ; Mantl, S.

jour

Hole Mobilities of $\\hbox {Si/Si}_{0.5}\\hbox {Ge}_{0.5}$ Quantum-Well Transistor on SOI and Strained SOI