DocumentCode :
1496602
Title :
Buried p-gate heterojunction field effect transistor
Author :
Nakamura, M. ; Wada, S. ; Kawasaki, H. ; Abe, M. ; Hase, I.
Author_Institution :
Res. Centre, Sony Corp., Kanagawa, Japan
Volume :
35
Issue :
4
fYear :
1999
fDate :
2/18/1999 12:00:00 AM
Firstpage :
336
Lastpage :
338
Abstract :
A buried p+-AlGaAs gate AlGaAs-InGaAs-AlGaAs double heterostructure field effect transistor (FET) (p-gate HFET) operating in enhancement mode has been successfully fabricated using the Zn-diffusion technique. A low on-resistance of 1.6 Ω mm and a high gate built-in voltage of 1.5 V with a maximum transconductance of 420 mS/mm were obtained for a 0.8 μm gate device. The buried p-gate HFET is promising for power-FET applications which require low distortion, high efficiency and positive bias operation
Keywords :
III-V semiconductors; aluminium compounds; buried layers; gallium arsenide; indium compounds; power field effect transistors; semiconductor device breakdown; zinc; 0.8 micron; 1.5 V; 420 mS/mm; AlGaAs:Zn-AlGaAs-InGaAs-AlGaAs; Zn-diffusion technique; buried p-gate HFET; double heterostructure FET; enhancement mode; gate built-in voltage; heterojunction field effect transistor; high efficiency; low distortion; on-resistance; p+-AlGaAs gate; positive bias operation; power FET applications; transconductance;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19990218
Filename :
756733
Link To Document :
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