A 0.2–2.6 GHz Wideband Noise-Reduction Gm-Boosted LNA

Author

Lee, Hua-Chin ; Wang, Chao-Shiun ; Wang, Chorng-Kuang

Author_Institution

Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

22

Issue

5

fYear

2012

fDate

5/1/2012 12:00:00 AM

Firstpage

269

Lastpage

271

Abstract

This letter presents a wideband low-noise amplifier (LNA) which utilizes g_m-boosted and noise-reduction techniques. The proposed DC-coupled 2-stage LNA employs an error amplifier to cancel the DC-offset voltage between the differential DC-coupled paths. The LNA is implemented in 90-nm digital CMOS technology. Within 0.2-2.6 GHz wideband applications, the LNA achieves 24 dB voltage gain, 1.9-2.9 dB NF, - 3 dBm IIP3. The core power of the LNA draws 9 mA from 1V supply voltage and occupies 0.046 mm².

Keywords

CMOS analogue integrated circuits; DC amplifiers; differential amplifiers; low noise amplifiers; wideband amplifiers; CMOS technology; DC-coupled 2-stage LNA; DC-offset voltage; IIP3; NF; core power; current 9 mA; differential DC-coupled paths; error amplifier; frequency 0.2 GHz to 2.6 GHz; gain 24 dB; gm-boosted techniques; noise figure 1.9 dB to 2.9 dB; noise-reduction techniques; size 90 nm; voltage 1 V; voltage gain; wideband applications; wideband low-noise amplifier; wideband noise-reduction gm-boosted LNA; CMOS integrated circuits; Gain; Impedance matching; Noise; Solid state circuits; Wideband; Wireless communication; ${rm g}_{rm m}$ -boosted; DC-offset cancellation; low-noise amplifier (LNA); noise-reduction;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2012.2191275

Filename

6184339