Title :
Three-dimensional SRAM design with on-chip access time measurement
Author :
Chen, Xia ; Zhu, T. ; Davis, William Rhett
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Abstract :
An SRAM design in a 3D 0.18 m silicon-on-insulator technology is presented. A novel delay-locked loop based access time measurement circuit was designed on-chip for accurately evaluating the 3D SRAM performance. Results show that a 32 improvement in the access time is gained by using 3D technology.
Keywords :
random-access storage; silicon-on-insulator; time measurement; 3D SRAM performance; access time measurement circuit; delay-locked loop; on-chip access time measurement; silicon-on-insulator technology; three-dimensional SRAM design;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2010.3701
