• DocumentCode
    1496772
  • Title

    Three-dimensional SRAM design with on-chip access time measurement

  • Author

    Chen, Xia ; Zhu, T. ; Davis, William Rhett

  • Author_Institution
    Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
  • Volume
    47
  • Issue
    8
  • fYear
    2011
  • Firstpage
    485
  • Lastpage
    486
  • Abstract
    An SRAM design in a 3D 0.18 m silicon-on-insulator technology is presented. A novel delay-locked loop based access time measurement circuit was designed on-chip for accurately evaluating the 3D SRAM performance. Results show that a 32 improvement in the access time is gained by using 3D technology.
  • Keywords
    random-access storage; silicon-on-insulator; time measurement; 3D SRAM performance; access time measurement circuit; delay-locked loop; on-chip access time measurement; silicon-on-insulator technology; three-dimensional SRAM design;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2010.3701
  • Filename
    5751784
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1496772