• DocumentCode
    1496825
  • Title

    A Fast Spline Curve Rendering Accelerator Architecture

  • Author

    Chang, Yun-Nan

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Nat. Sun Yat-sen Univ., Kaohsiung, Taiwan
  • Volume
    56
  • Issue
    11
  • fYear
    2009
  • Firstpage
    870
  • Lastpage
    874
  • Abstract
    Spline curve rendering is an essential operation in modern 2-D graphic applications. Different from the software acceleration approach by graphic processor units, this brief presents a very large scale integration hardware accelerator architecture for supporting fast curve rendering. Many existing accelerators employ a sequential forward-difference algorithm, where a step size is used in calculating the next sample on the curve. The problem of hardware-based curve rendering is that feedback loops are required to accumulate the difference, and these loops inhibit many traditional performance-enhancement strategies such as unfolding and pipelining. This brief proposes a different parallel design approach by transforming the difference equation set into parallel ones. Each equation has to be equipped with the same increased step size but accumulated starting from different initial values. Although more initial values must be precomputed, this computation can itself be sped up by using the accelerator. The proposed design can be applied not only to cubic spline curves but also to any curves defined by parameterized polynomial functions.
  • Keywords
    VLSI; difference equations; rendering (computer graphics); splines (mathematics); 2D graphic applications; difference equation; graphic processor units; hardware-based curve rendering; parallel design approach; parameterized polynomial functions; performance-enhancement strategies; sequential forward-difference algorithm; software acceleration; spline curve rendering accelerator architecture; very large scale integration hardware accelerator architecture; Bezier curve; curve rendering; spline curve;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2009.2029165
  • Filename
    5282544