Stress Liner Effects for 32-nm SOI MOSFETs With HKMG

Author

Cai, Ming ; Ramani, Karthik ; Belyansky, Michael ; Greene, Brian ; Lee, Doug H. ; Waidmann, Stephan ; Tamweber, Frank ; Henson, William

Author_Institution

Semicond. R&D Center, Syst. & Technol. Group, IBM, Hopewell Junction, NY, USA

Volume

57

Issue

7

fYear

2010

fDate

7/1/2010 12:00:00 AM

Firstpage

1706

Lastpage

1709

Abstract

Strain effects from stress liners on silicon-on-insulator MOSFETs with high-k dielectric and metal gate (HKMG) are reported. By thoroughly evaluating their impact on drive current, mobility, and threshold voltage, the intrinsic performance gain of stress liners is quantified at the 32-nm node with mobility enhancement identified as the major source. It is also experimentally demonstrated that advantageous stress liners can reduce gate leakage currents for MOSFETs with HKMG.

Keywords

MOSFET; leakage currents; silicon-on-insulator; HKMG; SOI MOSFET; drive current; gate leakage current; high-k dielectric; metal gate; mobility enhancement; silicon-on-insulator; size 32 nm; strain effect; stress liner effect; threshold voltage; CMOS technology; Capacitive sensors; Compressive stress; DSL; High-K gate dielectrics; Leakage current; MOSFETs; Silicon on insulator technology; Tensile stress; Threshold voltage; High-$k$; MOSFETs; metal gate; strained silicon; stress nitride;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2010.2049076

Filename

5467180