• DocumentCode
    1496901
  • Title

    Integrating the teaching of computer organization and architecture with digital hardware design early in undergraduate courses

  • Author

    Calazans, Ney Laert Vilar ; Moraes, Fernando Gehm

  • Author_Institution
    Fac. de Inf., Univ. Catolica do Rio Grande do Sul, Porto Alegre, Brazil
  • Volume
    44
  • Issue
    2
  • fYear
    2001
  • fDate
    5/1/2001 12:00:00 AM
  • Firstpage
    109
  • Lastpage
    119
  • Abstract
    This paper describes a new way to teach computer organization and architecture concepts with extensive hands-on hardware design experience very early in computer science curricula. While describing the approach, it addresses relevant questions about teaching computer organization, computer architecture and hardware design to students in computer science and related fields. The justification to concomitantly teach two often separately addressed subjects is twofold. First, to provide a better insight into the practical aspects of computer organization and architecture. Second, to allow addressing only highly abstract design levels yet achieving reasonably performing implementations, to make the integrated teaching approach feasible. The approach exposes students to many of the essential issues incurred in the analysis, simulation, design and effective implementation of processors. Although the former separation of such connected disciplines has certainly brought academic benefits in the past, some modern technologies allow capitalizing on their integration. The practical implementation of the teaching approach comprises lecture as well as laboratory courses, starting in the third semester of an undergraduate computer science curriculum. In four editions of the first two courses, most students have obtained successful processor implementations. In some cases, considerably complex applications, such as bubble sort and quick sort procedures were programmed in assembly and or machine code and run at the hardware description language simulation level in the designed processors
  • Keywords
    computer architecture; computer science education; digital systems; educational courses; hardware description languages; teaching; VHDL; academic benefits; assembly code; bubble sort procedures; computer architecture teaching; computer organization teaching; computer science curricula; computer-aided design tools; design entry; design validation; digital hardware design; fast hardware prototyping platforms; hands-on hardware design experience; hardware description language simulation; laboratory courses; machine code; quick sort procedure; teaching; undergraduate computer science curriculum; undergraduate courses; Analytical models; Application software; Assembly; Computational modeling; Computer architecture; Computer science; Education; Hardware design languages; Laboratories; Process design;
  • fLanguage
    English
  • Journal_Title
    Education, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9359
  • Type

    jour

  • DOI
    10.1109/13.925805
  • Filename
    925805