Title :
Modeling of Integrated Circuit Yield Using a Spatial Nonhomogeneous Poisson Process
Author :
Hwang, Jung Yoon ; Kuo, Way ; Ha, Chunghun
Author_Institution :
Dept. of Syst. Eng., Samsung Electron., Youngin, South Korea
Abstract :
This paper proposes a new yield model for integrated circuits using a spatial point process. The defect density variation by location on a wafer is modeled by a spatial nonhomogeneous Poisson process. The intensity function of the yield model describes the defect pattern on wafers. As a result, the model differs from the existing compound Poisson yield models in its capability to describe the spatial defect distribution. Using model-based clustering, the defect clusters from assignable causes, which contain the information about the variations of manufacturing processes, can be classified from others. The proposed model considers the defect density variation among wafers and the impact of defect size on the probability of a defect causing the circuit failure. The performance of the new yield model is verified using simulated data and real data. Simulation results show that the new yield model performs better than a compound Poisson yield model.
Keywords :
integrated circuit manufacture; integrated circuit modelling; stochastic processes; defect density variation; integrated circuit yield modeling; manufacturing processes; model-based clustering; spatial defect distribution; spatial nonhomogeneous Poisson process; spatial point process; Compounds; Computational modeling; Equations; Integrated circuit modeling; Mathematical model; Semiconductor device modeling; Yield estimation; Model-based clustering; spatial point process; yield model;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
DOI :
10.1109/TSM.2011.2143733