Title :
Interfacial fracture toughness for delamination growth prediction in a novel peripheral array package
Author :
Sundararaman, Viswanathan ; Sitaraman, Suresh K.
Author_Institution :
George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fDate :
6/1/2001 12:00:00 AM
Abstract :
The objective of this study is to predict interfacial delamination propagation that may inhibit the performance of a novel surface mountable, high input/output (I/O) electronic package. Incorporation of such predictions in the design phase of the package can lead to judicial selection of materials and geometric parameters such that the interfacial delamination based failures can be avoided. This, in turn, leads to significant cost savings and shorter time-to-market due to the shortening of the prototyping and qualification testing phases. The focus of the present study is the prediction of potential delaminations at the encapsulant-backplate interface in a very small peripheral array (VSPA) package during manufacturing. The delamination growth prediction is based on the comparison of interfacial fracture parameters obtained from the numerical simulations to appropriate critical values determined experimentally using controlled fracture toughness tests. In this paper, the fracture toughness of the encapsulant/backplate interface is characterized using a fracture toughness test that requires simple test specimen, fixture and loading geometries. The critical interfacial fracture toughness and the fracture mode mixity are determined using closed-form and finite element analyses of the test specimen geometries, taking into consideration the effects of thermo-mechanical residual stresses resulting from the test specimen fabrication process. Furthermore, an experimental characterization of the encapsulant material is also conducted in order to assess the effects of its time- and temperature-dependent thermomechanical response on the fracture toughness of the encapsulant-backplate interface
Keywords :
delamination; encapsulation; finite element analysis; fracture toughness testing; integrated circuit packaging; internal stresses; surface mount technology; cost savings; delamination growth prediction; design phase; encapsulant material; encapsulant-backplate interface; finite element analyses; fracture mode mixity; fracture toughness tests; geometric parameters; interfacial fracture toughness; loading geometries; peripheral array package; potential delaminations; qualification testing phases; surface mountable high input/output package; thermo-mechanical residual stresses; time-to-market; Costs; Delamination; Electronics packaging; Geometry; Prototypes; Qualifications; Surface cracks; Testing; Thermomechanical processes; Time to market;
Journal_Title :
Components and Packaging Technologies, IEEE Transactions on
DOI :
10.1109/6144.926392