Low-Voltage Oxide-Based Electric-Double-Layer TFTs Gated by Stacked $\hbox {SiO}_{2}$ Electrolyte/Chitosan Hybrid Dielectrics

Low-voltage oxide-based electric-double-layer (EDL) thin-film transistors (TFTs) gated by stacked SiO₂ electrolyte/chitosan proton-conductor hybrid dielectric have been fabricated on glass substrates at room temperature. Such EDL TFTs exhibit a saturation mobility (μ_sat) of 7.8 cm² V^-1 s^-1, a subthreshold swing (S) of 100 mV/decade, a drain current on/off ratio (I_on/off) of 7.8 × 10⁵, and a threshold voltage (V_th) of -0.48 V. After aging for one month in air ambient without surface passivation, such device shows μ_sat of 3.5 cm² V^-1 s^-1, I_on/off of 1.2 × 10⁵, and S of 120 mV/decade. Control experiments demonstrate that devices gated by stacked SiO₂ electrolyte/chitosan hybrid dielectrics show improved stability compared with TFTs gated by single chitosan or single SiO₂ electrolyte gate dielectric.