DocumentCode :
1499624
Title :
Algorithm selection: a quantitative optimization-intensive approach
Author :
Potkonjak, Miodrag ; Rabaey, Jan M.
Author_Institution :
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
Volume :
18
Issue :
5
fYear :
1999
fDate :
5/1/1999 12:00:00 AM
Firstpage :
524
Lastpage :
532
Abstract :
Implementation platform selection is an important component of hardware-software codesign process which selects, for a given computation, the most suitable implementation platform. In this paper, we study the complementary component of hardware-software codesign, algorithm selection. Given a set of specifications for the targeted application, algorithm selection refers to choosing the most suitable completely specified computational structure for a given set of design goals and constraints, among several functionally equivalent alternatives. While implementation platform selection has been recently widely and vigorously studied, the algorithm selection problem has not been studied in computer-aided design domain until now. We first introduce the algorithm selection problem, and then analyze and classify its degrees of freedom. Next, we demonstrate an extraordinary impact of algorithm selection for achieving high throughput, and low-cost implementations. We define the algorithm selection problem formally and prove that throughput and area optimization using algorithm selection are computationally intractable problems. We also propose a relaxation-based heuristic for throughput optimization. Finally, we present an algorithm for cost optimization using algorithm selection. The effectiveness of methodology and proposed algorithms is illustrated using real-life examples
Keywords :
hardware-software codesign; optimisation; algorithm selection; area optimization; computer-aided design; cost optimization; hardware-software codesign; quantitative optimization; system-level synthesis; throughput optimization; Algorithm design and analysis; Application software; Cost function; Design automation; Design methodology; Design optimization; Discrete cosine transforms; Hardware; Silicon; Throughput;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.759065
Filename :
759065
Link To Document :
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