Title :
A comment on “Improving a nonenumerative method to estimate path delay fault coverage”
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fDate :
5/1/1999 12:00:00 AM
Abstract :
For the original paper see ibid., vol. 16, no. 7, p. 759-62 (1997). Here Pomeranz and Reddy comment on the aforementioned paper by K. Heragu et al
Keywords :
combinational circuits; delays; fault simulation; logic testing; fault simulation; logic circuits; nonenumerative method; path delay fault coverage estimation; Circuit faults; Circuit testing; Cities and towns; Delay estimation; Electrical fault detection; Fault detection; Logic testing;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
