• DocumentCode
    1500301
  • Title

    High-density interconnection using photosensitive polyimide and electroplated copper conductor lines

  • Author

    Chakravorty, K.K. ; Chien, C.-P. ; Cech, J.M. ; Tanielian, M.H. ; Young, P.L.

  • Author_Institution
    Boeing Aerosp. & Electron., Seattle, WA, USA
  • Volume
    13
  • Issue
    1
  • fYear
    1990
  • fDate
    3/1/1990 12:00:00 AM
  • Firstpage
    200
  • Lastpage
    206
  • Abstract
    Multilayer high-density thin-film interconnection structures with a wiring density of up to 1000 lines per inch per signal layer were fabricated using a photosensitive polyimide as dielectric and electroplated copper conductor lines. Lithographic considerations associated with the patterning of high-aspect-ratio (>1.0) polyimide precursor features and their distortions during high-temperature annealing steps were investigated. An anisotropic shrinkage causing inward skewing of the feature profiles was observed. This phenomenon strongly depended on the UV exposure conditions and appears to be related to nonuniformity in the precursor cross-link density. The present approach of electroplating small-geometry copper features in patterned polyimide trenches provides excellent planarization in interconnect structures containing high-aspect-ratio features. Transmission characteristics of high-frequency signals in these lossy interconnect lines showed minimal degradation in the pulse shape or attenuation in the pulse amplitude. A high-density memory module, consisting of two orthogonal X-Y layers of 25-μm-wide copper lines fabricated at a pitch of 80 μm over a silicon substrate, was fabricated. The two layers of conductor lines were interconnected with electroplated copper vias. Epoxy-based die-bonding and gold wire bonding techniques were used for the assembly of the populated module in a metal flat pack. Integrity of the fabricated copper-polyimide multichip modules under moisture and thermal stressing conditions was demonstrated
  • Keywords
    copper; electroplating; hybrid integrated circuits; integrated circuit technology; packaging; photolithography; polymers; thin film circuits; 25 micron; 80 micron; Au wire bonding; Cu electroplated conductor lines; HF transmission characteristics; Si subtrate; UV exposure conditions; UV lithography; X-Y layers; anisotropic shrinkage; die-bonding; distortions; feature profiles; high density interconnection; high-aspect-ratio features; high-density memory module; high-density thin-film interconnection structures; high-frequency signals; high-temperature annealing steps; inward skewing; lossy interconnect lines; metal flat pack; minimal degradation; multichip modules; multilayer interconnection; nonuniformity; patterned polyimide trenches; patterning; photosensitive polyimide; planarization; polyimide precursor features; precursor cross-link density; thermal stressing conditions; two layers of conductor lines; vias; wiring density; Anisotropic magnetoresistance; Annealing; Conductive films; Copper; Dielectric thin films; Nonhomogeneous media; Planarization; Polyimides; Pulse shaping methods; Wiring;
  • fLanguage
    English
  • Journal_Title
    Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0148-6411
  • Type

    jour

  • DOI
    10.1109/33.52871
  • Filename
    52871