Thin-film transistors incorporating a thin, high-quality PECVD SiO/sub 2/ gate dielectric

Author

Buchanan, D.A. ; Batey, J. ; Tierney, E.

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

9

Issue

11

fYear

1988

Firstpage

576

Lastpage

578

Abstract

Thin-film transistors (TFTs) have been made that incorporate a thin ( approximately 380 AA), high-quality plasma-enhanced chemical vapor deposition (PECVD) SiO/sub 2/ film as the gate dielectric in a staggered-inverted structure. Threshold voltages and mobilities have been found to be in the range of 1.6-2.4 V and 0.20-0.25 cm/sup 2/ V/sup -1/ s/sup -1/, respectively, where the exact values are dependent on the measurement technique used. Very low gate leakage currents (<10/sup -11/ A) were recorded when measured using a ramped I-V technique, even for electric fields as high as 5*10/sup 6/ V/cm.<>

Keywords

carrier mobility; dielectric thin films; insulated gate field effect transistors; leakage currents; plasma CVD coatings; silicon compounds; thin film transistors; 1.6 to 2.4 V; 10 pA; 380 AA; CVD; PECVD SiO/sub 2/ gate dielectric; Si-SiO/sub 2/; TFTs; carrier mobility; gate leakage currents; plasma-enhanced chemical vapor deposition; staggered-inverted structure; thin-film transistors; threshold voltages; Dielectric substrates; Dielectric thin films; Electric variables; Leakage current; MOSFETs; Plasma chemistry; Plasma displays; Semiconductor films; Silicon; Thin film transistors;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.9281

Filename

9281