DocumentCode :
1501558
Title :
Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth
Author :
Sangwoo Pae ; Taichi Su ; Denton, J.P. ; Neudeck, G.W.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume :
20
Issue :
5
fYear :
1999
fDate :
5/1/1999 12:00:00 AM
Firstpage :
194
Lastpage :
196
Abstract :
This paper presents for the first time, multiple layers of silicon-on-insulator (MLSOI) device islands fabricated using selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO) techniques. MLSOI has the potential for ultra dense device integration. SOI device islands as small as 150 nm×150 nm, with thickness down to 40 nm have been fabricated. SOI device islands (5 μm×500 μm) in the second layer have shown no stacking faults in the 1290 islands inspected. To demonstrate the device quality material, fully depleted SOI (FD-SOI) P-MOSFET´s were fabricated in the first layer SOI islands with gate lengths down to less than 170 nm. Typically they had low subthreshold leakage, below 0.2 pA/μm, and a subthreshold swing of 76 mV/dec was measured.
Keywords :
MOSFET; epitaxial growth; island structure; silicon-on-insulator; MLSOI fabrication; Si; epitaxial lateral overgrowth; fully depleted SOI P-MOSFET; multiple layers; selective epitaxial growth; silicon-on-insulator islands; Circuit faults; Epitaxial growth; Etching; Hydrogen; Integrated circuit interconnections; MOSFET circuits; Optical device fabrication; Oxidation; Silicon on insulator technology; Stacking;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.761012
Filename :
761012
Link To Document :
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