DocumentCode :
1501579
Title :
SCoPE: Towards a Systolic Array for SVM Object Detection
Author :
Kyrkou, Christos ; Theocharides, Theocharis
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Cyprus, Nicosia, Cyprus
Volume :
1
Issue :
2
fYear :
2009
Firstpage :
46
Lastpage :
49
Abstract :
This paper presents SCoPE (systolic chain of processing elements), a first step towards the realization of a generic systolic array for support vector machine (SVM) object classification in embedded image and video applications. SCoPE provides efficient memory management, reduced complexity, and efficient data transfer mechanisms. The proposed architecture is generic and scalable, as the size of the chain, and the kernel module can be changed in a plug and play approach without affecting the overall system architecture. These advantages provide versatility, scalability and reduced complexity that make it ideal for embedded applications. Furthermore, the SCoPE architecture is intended to be used as a building block towards larger systolic systems for multi-input or multi-class classification. Simulation results indicate real-time performance, achieving face detection at ~33 frames per second on an FPGA prototype.
Keywords :
face recognition; field programmable gate arrays; image classification; object detection; support vector machines; FPGA prototype; SCoPE; SVM object detection; data transfer mechanisms; face detection; field programmable gate array; generic systolic array; memory management; plug and play approach; support vector machine object classification; systolic chain of processing elements; Field-programmable gate array (FPGA); object detection; support vector machine (SVM); systolic array;
fLanguage :
English
Journal_Title :
Embedded Systems Letters, IEEE
Publisher :
ieee
ISSN :
1943-0663
Type :
jour
DOI :
10.1109/LES.2009.2034709
Filename :
5288615
Link To Document :
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