An electrically modifiable synapse array composed of metal-ferroelectric-semiconductor (MFS) FET´s using SrBi/sub 2/Ta/sub 2/O/sub 9/ thin films

Author

Yoon, Sung-Min ; Tokumitsu, Eisuke ; Ishiwara, Hiroshi

Author_Institution

Frontier Collaborative Res. Center, Tokyo Inst. of Technol., Yokohama, Japan

Volume

20

Issue

5

fYear

1999

fDate

5/1/1999 12:00:00 AM

Firstpage

229

Lastpage

231

Abstract

An array of metal-ferroelectric-semiconductor field effect transistors (MFSFETs) is fabricated on a silicon-on-insulator (SOI) structure using SrBi/sub 2/Ta/sub 2/O/sub 9/ as the gate insulator. It is demonstrated that each FET shows good characteristics as a nonvolatile analog memory due to partial polarization of the SrBi/sub 2/Ta/sub 2/O/sub 9/ film and that the array operates as an electrically modifiable synapse circuit for carrying out the weighted sum operation in an artificial neural network.

Keywords

MISFET; analogue storage; bismuth compounds; ferroelectric storage; ferroelectric thin films; neural nets; silicon-on-insulator; strontium compounds; MFSFET array; SOI structure; SrBi/sub 2/Ta/sub 2/O/sub 9/; SrBi/sub 2/Ta/sub 2/O/sub 9/ thin film; artificial neural network; electrically modifiable synapse circuit; gate insulator; metal-ferroelectric-semiconductor field effect transistor; nonvolatile analog memory; weighted sum operation; Analog memory; Circuits; FETs; Ferroelectric films; Laboratories; Large-scale systems; Metal-insulator structures; Nonvolatile memory; Polarization; Silicon on insulator technology;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.761023

Filename

761023