Title :
Topology for multilevel inverters to attain maximum number of levels from given DC sources
Author :
Gupta, K.K. ; Jain, Sonal
Author_Institution :
Dept. of Electr. Eng., Maulana Azad Nat. Inst. of Technol., Bhopal, India
fDate :
4/1/2012 12:00:00 AM
Abstract :
This study introduces a new multilevel converter topology, which can synthesise all possible additive and subtractive combinations of input DC levels in the output voltage waveform with fewer power electronic switches. An appropriate modulation scheme has also been proposed for low switching frequency operation of the proposed topology. As compared with the classic multilevel topologies, the proposed topology results in reduction of the number of switches and conduction losses. The operation and performance of the proposed multilevel converter has been ascertained through simulations and verified experimentally for single-phase nine-level multilevel inverter. Moreover, a 15-level inverter with asymmetric source configuration has been also investigated for charge balance control using the proposed modulation scheme. The same has been verified experimentally for effective balanced power delivery.
Keywords :
invertors; losses; power convertors; power semiconductor switches; topology; DC sources; asymmetric source configuration; balanced power delivery; charge balance control; conduction loss; input DC levels; low switching frequency operation; modulation scheme; multilevel converter topology; output voltage waveform; power electronic switches; single-phase multilevel inverters topology;
Journal_Title :
Power Electronics, IET
DOI :
10.1049/iet-pel.2011.0178