Title :
Planariation technology for Josephson integrated circuits
Author :
Nagasawa, S. ; Tsuge, H. ; Wada, Y.
Abstract :
Planarization technology has enabled completion of the multi-level layer structure, which is essential to the achievement of large-scale integration and high-speed operation. A new etch-back planarization technology, using 2000-molecular weight polystyrene, has been developed for Josephson integrated circuits (IC´s). This technology has been applied to fabricating the multilevel layer structure in magnetic coupled gates. The results, indicated by their cross-sectional SEM photographs and measured breakdown voltages, show that excellent planarity was achieved in this structure.<>
Keywords :
Josephson effect; large scale integration; superconducting junction devices; Josephson integrated circuits; breakdown voltages; cross-sectional SEM photographs; etch-back planarization technology; large-scale integration; magnetic coupled gates; multi-level layer structure; polystyrene; Insulation; Integrated circuit technology; Niobium; Planarization; Radio frequency; Resists; Sputter etching; Surface morphology; Temperature; Wire;
Journal_Title :
Electron Device Letters, IEEE
