DocumentCode
1504183
Title
Fault diagnosis assistant (VLSI chips)
Author
Purcell, Edward T.
Author_Institution
Hughes Aricraft Co., El Segundu, CA, USA
Volume
4
Issue
1
fYear
1988
Firstpage
47
Lastpage
59
Abstract
A description is given of a first implementation of a knowledge-based system for interactive support of test engineers in gate-level troubleshooting of faulty VLSI chips. The fault diagnosis assistant (FDA) offers advice on the next-best internal probe point for an electron-beam test probe system. The current OPS83 production system implementation of FDA recommends an efficient sequence of probes at internal nodes that progressively localizes and identified single stuck-at faults in combinational logic or combinational partitions within set/scan logic. Its model-based diagnostic methodology is based primarily on using model knowledge of the system´s structure (connectivity file) and function (normal, design-prescribed behavior) of the system´s primitive components. Some FDA implementation details and pattern-matching efficiency considerations, initial FDA timing experiments, and future extensions to FDA are considered.<>
Keywords
VLSI; automatic testing; electronic engineering computing; expert systems; fault location; integrated circuit testing; logic testing; IC testing; OPS83 production system implementation; VLSI chips; combinational logic; combinational partitions; computer aided testing; connectivity file; expert systems; fault diagnosis assistant; gate-level troubleshooting; interactive support; knowledge-based system; model-based diagnostic methodology; pattern-matching efficiency; set/scan logic; test probe positioning advice; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Diagnostic expert systems; Fault diagnosis; Logic; Probes; System testing; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Devices Magazine, IEEE
Publisher
ieee
ISSN
8755-3996
Type
jour
DOI
10.1109/101.930
Filename
930
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